Suppose for a moment that you're an engineer designing a new 8051-based product. Not unexpectedly, the application's code size will greatly exceed the 64KB architectural limit of the 8051's program ...
Multi-CPU, 8051 instruction-set-compatible parallel controller executes up to 300 MIPS in Actel Axcelerator FPGA and features concurrent real-time monitoring/debugging of all 9 CPUs via JTAG using ...
Californian start-up MicroCore Labs has announced an 8051 soft processor core, four of which will fit into 1227 LUTs on a Xilinx Artix-7 FPGA. The core is called MCL51. “Because it is based on a ...
Some people think that programs for microcontrollers like the 8051 that have limited program memory must be written in assembly language rather than a high-level language like C. The executable code ...
8051 instruction set compatible CPU soft core includes on-chip, real-time monitoring and debug capability, and is designed for implementation in Actel ProASICPLUS* re-programmable FPGAs PLANO, Texas, ...
Before we dig into core architectures and other technical details, it's important to convey some general guidelines and context. In my college days, I remember taking a test and being so intent on ...
Some results have been hidden because they may be inaccessible to you
Show inaccessible results