I choose OPA365 because it have IN/OUT Rail to Rail and high Current supply with High Bandwidth, good offset voltage. The R1 1ohm Resister is placed for driving high capacitive load. However I'm ...

Vin: I created a circuit that boots from 5V to 6.3V and converts it to 5V with a regulator, but when I connect a 100mA load, Vout drops to 5.3V. Can you catch a waveform of the unexpected Vout drop.

Hi, Uttam. :) I am using the BP-DAC11001EVM and MSP-EXP432E401Y. I am powering the eval board with +/-15V, 5V for ref power, and 5V for VDD. I am measuring the output over time, and I see a very low ...

I have several questions blew: 1.What is the transmission speed of IPC RPMessage between R5_0_0 core and R5_1_0 core? 2.What is the transmission speed of IPC RPMessage between R5_0_0 core and m4_0_0 ...

I have a situation where 4 of the ADC3664 devices will be used in a design. The devices will operate from the same input clock source and are intended to be synchronous. My question is: can the FPGA ...

I am stacking two BQ76952 ICs and interfacing them to an MCU using SPI. IC-1 is powered from cells 1-16. IC-2 is powered from 17-19. Both ICs are interfaced with MCU using a single SPI module and ...

I think i have identified a discrepancy in the documentation of the MSTGENA field descriptions for the Memory Self-Test Controller Global Enable Key. This needs to be reviewed and corrected to align ...