July 4, 2025. More for You ...

This paper presents an improved parallel adder. Based on the achievements of parallel adders developed by the team of Ternary Optical Computer(TOC), this adder introduces variable distance shifting ...

A novel 1-bit hybrid full adder circuit is implemented using eighteen transistors. Simulations are done using the Cadence Virtuoso Schematic Editor in 180 and 90 nm technologies. The performances are ...